H.264 HD Video Decoder Chipset
(H.264 HD Video/Audio Decoder Chipset)


The SOC H.264 HD Decoder Chipset includes an FPGA and a FLASH preconfigured with SOC's H.264 HD Decoder IP Core. It is an ASIC that receives an H.264 video (and optional AAC/MP2/MP3 audio) stream and outputs raw video/audio. It supports resolutions up 1080p at 120 fps.

DC-VA-H264-8b-60-1080-C

Features and Specifications

See related IP Core: H.264 HD Decoder IP Core

Product Table


CodeAudioPrecisionFramerate
DC-VA-H264-8b-30-1080-CVideo+Audio8 bits per pixelup to 30fps
DC-V-H264-8b-30-1080-CVideo Only8 bits per pixelup to 30fps
DC-VA-H264-10b-30-1080-CVideo+AudioUp to 10 bits per pixelup to 30fps
DC-V-H264-10b-30-1080-CVideo OnlyUp to 10 bits per pixelup to 30fps
DC-VA-H264-8b-60-1080-CVideo+Audio8 bits per pixelup to 60fps
DC-V-H264-8b-60-1080-CVideo Only8 bits per pixelup to 60fps
DC-VA-H264-10b-60-1080-CVideo+AudioUp to 10 bits per pixelup to 60fps
DC-V-H264-10b-60-1080-CVideo OnlyUp to 10 bits per pixelup to 60fps

Deliverables


  1. Specially selected FPGA chip
  2. Preconfigured FLASH memory chip
  3. PCB drop-in reference design
  4. Documentation

Peripheral IP Cores


SOC offers compatible high-performance peripheral IP cores for common functions.

Product Evaluation Kits


The H.264 HD Video Decoder Chipset can be evaluated on SOC'sDevelopment Boards.The boards can also be used for product development, having the ports and extensions necessary for most video-based applications. SOC provides and licenses reference designs and board files if needed.

Begin the evaluation process by any of these methods:

Customer Support


  • Telephone/email support.
  • IP Core updates/maintenance subscription.