MPEG-2 Video Decoder Chipset
(MPEG-2 Video/Audio Decoder Chipset)


The MPEG-2 Video Decoder Chipset includes an FPGA and a FLASH preconfigured with SOC's MPEG-2 Decoder IP Core. It is an ASIC that receives MPEG-2 compressed stream and outputs decompressed video and audio data.

DC-VA-MPEG2-8b-60-1080-C

Features and Specifications

See related IP Core: MPEG-2 Decoder IP Core

Product Table


CodeAudioPrecisionFramerate
DC-VA-MPEG2-8b-30-1080-CVideo+Audio8 bits per pixelup to 30fps
DC-V-MPEG2-8b-30-1080-CVideo Only8 bits per pixelup to 30fps
DC-VA-MPEG2-10b-30-1080-CVideo+AudioUp to 10 bits per pixelup to 30fps
DC-V-MPEG2-10b-30-1080-CVideo OnlyUp to 10 bits per pixelup to 30fps
DC-VA-MPEG2-8b-60-1080-CVideo+Audio8 bits per pixelup to 60fps
DC-V-MPEG2-8b-60-1080-CVideo Only8 bits per pixelup to 60fps
DC-VA-MPEG2-10b-60-1080-CVideo+AudioUp to 10 bits per pixelup to 60fps
DC-V-MPEG2-10b-60-1080-CVideo OnlyUp to 10 bits per pixelup to 60fps

Deliverables


  1. Specially selected FPGA chip
  2. Preconfigured FLASH memory chip
  3. PCB drop-in reference design
  4. Documentation

Peripheral IP Cores


SOC offers compatible high-performance peripheral IP cores for common functions.

Product Evaluation Kits


The MPEG-2 Video Decoder Chipset can be evaluated on SOC'sDevelopment Boards.The boards can also be used for product development, having the ports and extensions necessary for most video-based applications. SOC provides and licenses reference designs and board files if needed.

Begin the evaluation process by any of these methods:

Customer Support


  • Telephone/email support.
  • IP Core updates/maintenance subscription.