MPEG-2 Video Decoder Chipset
(MPEG-2 Video/Audio Decoder Chipset)

  The MPEG-2 Video Decoder Chipset includes an FPGA and a FLASH preconfigured with SOC's MPEG-2 Decoder IP Core. It is an ASIC that receives MPEG-2 compressed stream and outputs decompressed video and audio data.


  1. Specially selected FPGA chip
  2. Preconfigured FLASH memory chip
  3. Drop-in PCB reference design
  4. Documentation

Product Evaluation Kits

 The MPEG-2 Video Decoder Chipset can be evaluated on SOC's Evaluation Kits. Evaluation kits include a carrier-board with all the ports and extensions needed for most video-based applications. The module and carrier board firmware are reconfigurable, and we can license board files if needed.

Begin the evaluation process through any of these methods:

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