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H.264 8K Video Decoder IP Core
(H.264 8K Video/Audio Decoder IP Core)

SOC provides an H.264/AVC Decoder IP Core for up to 8K (7680 × 4320) resolution.

Specifications

StandardH.264/AVC (ISO/IEC14496-10)
ProfileUp to High Profile
Levels5.2
Max Resolution8K (7680 × 4320p) at 60fps
Chroma
  • 4:2:2
  • 4:2:0
Precision
  • 8-bits
  • 10-bit
Input Formats
  • Elementary Stream (ES)
  • Transport Stream (TS)
Latency~1 ms
FPGA Resources
Xilinx
LUTs170,000
Block RAM14Mb
DSPs100
Example FPGA
  • Zynq-7000
  • Kintex-7000
Intel
ALMs120,000
Block RAM12Mb
DSPs100
Example FPGAs
  • Stratix-V
  • Arria-10
NoteResource values are for 30fps. Double the resource values for 60fps.

Deliverables

  1. IP Core as an FPGA-targeted Netlist
  2. Core instantiation reference design
  3. Integration Guide, API Register Guide

Product Evaluation Kits

The H.264 8K Video Decoder IP Core can be evaluated on SOC's Evaluation Kits. Evaluation kits include a carrier-board with all the ports and extensions needed for most video-based applications. The module and carrier board firmware are reconfigurable, and we can license board files if needed.

Begin the evaluation process by any of these methods:

Support

  • Telephone/email support
  • IP Core updates/maintenance subscription
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