H.264 HD Video Decoder Chipset
(H.264 HD Video/Audio Decoder Chipset)


The SOC H.264 HD Decoder Chipset includes an FPGA and a FLASH preconfigured with SOC's H.264 HD Decoder IP Core. It is an ASIC that receives an H.264 video (and optional AAC/MP2/MP3 audio) stream and outputs raw video/audio. It supports resolutions up 1080p at 120 fps.

DC-VA-H264-8b-60-1080-C

Features and Specifications

See related IP Core: H.264 HD Decoder IP Core

Product Table


CodeAudioPrecisionFramerate
DC-VA-H264-8b-30-1080-CVideo+Audio8 bits per pixelup to 30fps
DC-V-H264-8b-30-1080-CVideo Only8 bits per pixelup to 30fps
DC-VA-H264-10b-30-1080-CVideo+AudioUp to 10 bits per pixelup to 30fps
DC-V-H264-10b-30-1080-CVideo OnlyUp to 10 bits per pixelup to 30fps
DC-VA-H264-8b-60-1080-CVideo+Audio8 bits per pixelup to 60fps
DC-V-H264-8b-60-1080-CVideo Only8 bits per pixelup to 60fps
DC-VA-H264-10b-60-1080-CVideo+AudioUp to 10 bits per pixelup to 60fps
DC-V-H264-10b-60-1080-CVideo OnlyUp to 10 bits per pixelup to 60fps

Deliverables


  1. Specially selected FPGA chip
  2. Preconfigured FLASH memory chip
  3. Drop-in PCB reference design
  4. Documentation

Additional IP Cores


Other IP Cores from SOC

Product Evaluation Kits


The H.264 HD Video Decoder Chipset can be evaluated on SOC's Evaluation Kits. Evaluation kits include a carrier-board with all the ports and extensions needed for most video-based applications. The module and carrier board firmware are reconfigurable, and we can license board files if needed.

Begin the evaluation process by any of these methods:

Support


  • Telephone/email support
  • IP Core updates/maintenance subscription