H.265 HD Video Decoder Chipset
(H.265 HD Video/Audio Decoder Chipset)


  The SOC H.265 HD Decoder Chipset includes an FPGA and a FLASH preconfigured with SOC's H.265 HD Decoder IP Core. It is an ASIC that receives an H.265 video (and optional AAC/MP2/MP3 audio) stream and outputs raw video/audio. It supports resolutions up 1080p at 120 fps.

Deliverables


  1. Specially selected FPGA chip
  2. Preconfigured FLASH memory chip
  3. Drop-in PCB reference design
  4. Documentation

Product Evaluation Kits


 The H.265 HD Video Decoder Chipset can be evaluated on SOC's Evaluation Kits. Evaluation kits include a carrier-board with all the ports and extensions needed for most video-based applications. The module and carrier board firmware are reconfigurable, and we can license board files if needed.

Begin the evaluation process through any of these methods:



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