H.264 8K Video Encoder IP Core
(H.264 8K Video/Audio Encoder IP Core)


SOC provides an H.264 8K encoder IP Core for Xilinx FPGAs. The encoder supports up to 8K (7680 × 4320) resolution at 60 fps. Parameters including bitrate, latency, quantization, GOP are configurable at run-time using API registers.

Deliverables


  1. IP Core as an FPGA-targeted Netlist
  2. Core instantiation reference design
  3. Integration Guide, API Register Guide

Specifications


Standard:H.264/AVC (ISO/IEC14496-10)
Resolution/FPS:Up to 8K(7680 × 4320p) at 60 fps
Frame Types:I, P or B
Chroma:4:2:0 or 4:2:2
Precision:8 or 10 bit
Output:Elementary or Transport Stream
Latency:1 ms
Bitrate:
  • Variable Bitrate, Constant Bitrate or Constant-QP
  • 5 - 200Mbps, 15Mbps Average for 1080p60
Entropy Coding:CAVLC or CABAC
FPGA Resources:
Xilinx:
LUTs:110,000
Block RAM:10Mb
DSPs:235
Intel:
ALMs:73,000
Block RAM:6Mb
DSPs:239
Note:Resource values are for 30fps. Double the resource values for 60fps.

Product Evaluation Kits


 The H.264 8K Video Encoder IP Core can be evaluated on SOC's Evaluation Kits. Evaluation kits include a carrier-board with all the ports and extensions needed for most video-based applications. The module and carrier board firmware are reconfigurable, and we can license board files if needed.

Begin the evaluation process through any of these methods:



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