The MPEG-2 Video Encoder IP Core is a high-performance encoder of single or multiple MPEG-2 video streams. It is implemented using proprietary single-clock driven, all-hardware parallel architecture without a microprocessor.
Standard: | MPEG-2/H.262 (ISO/IEC 13818) | ||||||||||||||||
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Resolution/FPS: | Up to FHD(2048 × 1080p) at 60 fps | ||||||||||||||||
Frame Types: | I, P or B | ||||||||||||||||
Chroma: | 4:2:0 or 4:2:2 | ||||||||||||||||
Precision: | 8 bit | ||||||||||||||||
Output: | Elementary or Transport Stream | ||||||||||||||||
Latency: | 0.25 ms | ||||||||||||||||
Bitrate: |
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FPGA Resources: |
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The MPEG-2 Video Encoder IP Core can be evaluated on SOC's Evaluation Kits. Evaluation kits include a carrier-board with all the ports and extensions needed for most video-based applications. The module and carrier board firmware are reconfigurable, and we can license board files if needed.
Begin the evaluation process through any of these methods: