MPEG-2 Video Decoder IP Core
(MPEG-2 Video/Audio Decoder IP Core)


The MPEG-2 Video Decoder IP Core is a versatile, high-performance video decoding engine that supports all standard resolutions and frame rates. It is trusted by broadcast customers as it supports all required features to deliver video to living rooms.

Specifications


StandardMPEG-2/H.262 (ISO/IEC 13818)
Profiles
  • Simple
  • Main
  • High
  • 422
LevelsLow, Main, High-1440, High
Input Bit RatesUp to 100Mbps
Video ResolutionsUp to 1920×1080
Frame RatesUp to 60 fps
Chroma
  • 4:2:2
  • 4:2:0
Precision
  • 8-bit
Output Format
  • MPEG-2 Elementary
  • MPEG-2 Transport Stream
Video Input Format
  • RGB
  • YUV
Latency0.25 ms
Power Consumption700 mW (core only)
Supported FPGAs
  • Xilinx
  • Intel

Product Table


CodeAudioPrecisionFramerate
DC-VA-MPEG2-8b-30-1080-IPVideo+Audio8 bits per pixelup to 30fps
DC-V-MPEG2-8b-30-1080-IPVideo Only8 bits per pixelup to 30fps
DC-VA-MPEG2-10b-30-1080-IPVideo+AudioUp to 10 bits per pixelup to 30fps
DC-V-MPEG2-10b-30-1080-IPVideo OnlyUp to 10 bits per pixelup to 30fps
DC-VA-MPEG2-8b-60-1080-IPVideo+Audio8 bits per pixelup to 60fps
DC-V-MPEG2-8b-60-1080-IPVideo Only8 bits per pixelup to 60fps
DC-VA-MPEG2-10b-60-1080-IPVideo+AudioUp to 10 bits per pixelup to 60fps
DC-V-MPEG2-10b-60-1080-IPVideo OnlyUp to 10 bits per pixelup to 60fps

Deliverables


  1. IP Core as targeted FPGA Netlist
  2. Core instantiation reference design
  3. Documentation

Product Evaluation Kits


The MPEG-2 Video Decoder IP Core can be evaluated on SOC'sDevelopment Boards.The boards can also be used for product development, having the ports and extensions necessary for most video-based applications. SOC provides and licenses reference designs and board files if needed.

Begin the evaluation process by any of these methods:

Customer Support


  • Telephone/email support.
  • IP Core updates/maintenance subscription.